Data Structures
PCIE LLD Type1 (root) Register Definitions
PCIE LLD Configuration Register Definitions

Data Structures

struct  pcieType1BarIdx_s
 pcieBarReg_s register plus an index (Root Complex BAR) More...
struct  pcieType1Bar32bitIdx_s
 pcieBar32bitReg_s register plus an index (Root Complex BAR) More...
struct  pcieType1BistHeaderReg_s
 Specification of the BIST, Header Type, Latency Time and Cache Line Size Regiser. More...
struct  pcieType1BusNumReg_s
 Specification of the Latency Timer and Bus Number Register. More...
struct  pcieType1SecStatReg_s
 Specification of the Secondary Status and IO Base/Limit Register. More...
struct  pcieType1MemspaceReg_s
 Specification of the Memory Limit and Base Register. More...
struct  pciePrefMemReg_s
 Specification of the Prefetchable Memory Limit and Base Register. More...
struct  pciePrefBaseUpperReg_s
 Specification of the Prefetchable Memory Base Upper Register. More...
struct  pciePrefLimitUpperReg_s
 Specification of the Prefetchable Memory Limit Upper Register. More...
struct  pcieType1IOSpaceReg_s
 Specification of the IO Base and Limit Upper 16 bits Register. More...
struct  pcieType1CapPtrReg_s
 Specification of the Capabilities Pointer Register. More...
struct  pcieType1ExpnsnRomReg_s
 Specification of the Expansion ROM Base Address Register. More...
struct  pcieType1BridgeIntReg_s
 Specification of the Bridge Control and Interrupt Register. More...
typedef struct pcieType1BarIdx_s pcieType1BarIdx_t
 pcieBarReg_s register plus an index (Root Complex BAR)
typedef struct
pcieType1Bar32bitIdx_s 
pcieType1Bar32bitIdx_t
 pcieBar32bitReg_s register plus an index (Root Complex BAR)
typedef struct
pcieType1BistHeaderReg_s 
pcieType1BistHeaderReg_t
 Specification of the BIST, Header Type, Latency Time and Cache Line Size Regiser.
typedef struct pcieType1BusNumReg_s pcieType1BusNumReg_t
 Specification of the Latency Timer and Bus Number Register.
typedef struct
pcieType1SecStatReg_s 
pcieType1SecStatReg_t
 Specification of the Secondary Status and IO Base/Limit Register.
typedef struct
pcieType1MemspaceReg_s 
pcieType1MemspaceReg_t
 Specification of the Memory Limit and Base Register.
typedef struct pciePrefMemReg_s pciePrefMemReg_t
 Specification of the Prefetchable Memory Limit and Base Register.
typedef struct
pciePrefBaseUpperReg_s 
pciePrefBaseUpperReg_t
 Specification of the Prefetchable Memory Base Upper Register.
typedef struct
pciePrefLimitUpperReg_s 
pciePrefLimitUpperReg_t
 Specification of the Prefetchable Memory Limit Upper Register.
typedef struct
pcieType1IOSpaceReg_s 
pcieType1IOSpaceReg_t
 Specification of the IO Base and Limit Upper 16 bits Register.
typedef struct pcieType1CapPtrReg_s pcieType1CapPtrReg_t
 Specification of the Capabilities Pointer Register.
typedef struct
pcieType1ExpnsnRomReg_s 
pcieType1ExpnsnRomReg_t
 Specification of the Expansion ROM Base Address Register.
typedef struct
pcieType1BridgeIntReg_s 
pcieType1BridgeIntReg_t
 Specification of the Bridge Control and Interrupt Register.

Typedef Documentation

pcieBar32bitReg_s register plus an index (Root Complex BAR)

There are multiple instances of this register. The index is used to select which instance of the register will be accessed.

This structure is used to access a Root Complex BAR. For more details, please refer to pcieBar32bitReg_t.

pcieBarReg_s register plus an index (Root Complex BAR)

There are multiple instances of this register. The index is used to select which instance of the register will be accessed.

This structure is used to access a Root Complex BAR. For more details, please refer to pcieBarReg_t.


Copyright 2014, Texas Instruments Incorporated