nwal_tune.h File Reference

Compile time Tunable parameters for NWAL Module. More...

Defines

Threshold for Maximum RX packet to be received in one call back

Threshold for Maximum RX packet to be received in one call back

NOTE: (C) Copyright 2010-2012 Texas Instruments, Inc.

Threshold for Maximum RX packet to be received in one call back

#define NWAL_MAX_RX_PKT_THRESHOLD   32
#define NWAL_CACHE_LINE_SIZE   128
#define NWAL_DESC_SIZE   128
#define NWAL_ENABLE_RX_NETCP_IP_INTENSIVE_CHECK   1
#define NWAL_MAX_PENDING_IPSEC_STATS   4

Detailed Description

Compile time Tunable parameters for NWAL Module.

path ti/drv/nwal/nwal_tune.h


Define Documentation

#define NWAL_CACHE_LINE_SIZE   128

Default cache line size used while factoring in memory requirements at NWAL. Default value is factoring in C66x devices For processors such as ARMv7 this could be modified to 64 to reduce memory requirement at NWAL

#define NWAL_DESC_SIZE   128

Default value is factoring in additional PS command for the packets to NetCP

Enable more intensive check at NetCP for IPv4 header for received packets. Disable by commenting out below define only for specific application need

Maximum number of IPSec Stats requests pending at a point of time at each core/process Parameter

#define NWAL_MAX_RX_PKT_THRESHOLD   32

Threshold for maximum packets which can be received in one call back


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